An efficient design for reversible Wallace unsigned multiplier

Title
An efficient design for reversible Wallace unsigned multiplier
Authors
Keywords
Reversible logic, Multiplier circuits, Wallace tree, Quantum computing, Nanotechnology
Journal
THEORETICAL COMPUTER SCIENCE
Volume -, Issue -, Pages -
Publisher
Elsevier BV
Online
2018-06-08
DOI
10.1016/j.tcs.2018.06.007

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