Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies

Title
Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies
Authors
Keywords
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Journal
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 50, Issue 9, Pages 2061-2073
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2015-06-05
DOI
10.1109/jssc.2015.2433269

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