Journal
JOURNAL OF PHYSICS D-APPLIED PHYSICS
Volume 51, Issue 15, Pages -Publisher
IOP PUBLISHING LTD
DOI: 10.1088/1361-6463/aab4ba
Keywords
chemical vapor deposition; CMOS process; semiconductor device manufacture; semiconductor nanostructures; thin film transistors; wafer scale integration; MOSFET
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Funding
- U.S. Office of Naval Research [N00014-14-1-0653]
- Air Force Office of Scientific Research
- National Science Foundation under EFRI 2-DARE Grant [1433459-EFMA]
- Institute for Basic Science, Republic of Korea [IBS-R011-D1]
- National Science Foundation [ECCS-1542081]
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Thousands of high-performance 2D metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated on wafer-scale chemical vapor deposited MoS2 with fully-CMOS-compatible processes such as photolithography and aluminum metallurgy. The yield was greater than 50% in terms of effective gate control with less-than-10 V threshold voltage, even for MOSFETs having deep-submicron gate length. The large number of fabricated MOSFETs allowed statistics to be gathered and the main yield limiter to be attributed to the weak adhesion between the transferred MoS2 and the substrate. With cut-off frequencies approaching the gigahertz range, the performances of the MOSFETs were comparable to that of state-of-the-art MoS2 MOSFETs, whether the MoS2 was grown by a thin-film process or exfoliated from a bulk crystal.
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