Journal
IEEE TRANSACTIONS ON INFORMATION THEORY
Volume 64, Issue 4, Pages 3099-3120Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIT.2018.2800059
Keywords
Coded caching; resolvable designs; cyclic codes; subpacketization level
Funding
- National Science Foundation [CCF-1718470, CCF-1320416, CCF-1149860]
- Division of Computing and Communication Foundations
- Direct For Computer & Info Scie & Enginr [1149860] Funding Source: National Science Foundation
Ask authors/readers for more resources
Coded caching is a technique that generalizes conventional caching and promises significant reductions in traffic over caching networks. However, the basic coded caching scheme requires that each file hosted in the server be partitioned into a large number (i.e., the subpacketization level) of non-overlapping subfiles. From a practical perspective, this is problematic as it means that prior schemes are only applicable when the size of the files is extremely large. In this paper, we propose coded caching schemes based on combinatorial structures called resolvable designs. These structures can be obtained in a natural manner from linear block codes whose generator matrices possess certain rank properties. We obtain several schemes with subpacketization levels substantially lower than the basic scheme at the cost of an increased rate. Depending on the system parameters, our approach allows us to operate at various points on the subpacketization level vs. rate tradeoff.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available