4.7 Article

IMAGING: In-Memory AlGorithms for Image processiNG

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2018.2846699

Keywords

von Neumann bottleneck; memristors; MAGIC; algorithms; processing in memory

Funding

  1. European Research Council through the European Union's Horizon 2020 Research and Innovation Programme [757259]
  2. Viterbi Fellowship at the Technion Computer Engineering Center
  3. EU ICT COST Action [IC1401]
  4. Israel Science Foundation [1514/17]

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Data-intensive applications such as image processing suffer from massive data movement between memory and processing units. The severe limitations on system performance and energy efficiency imposed by this data movement are further exacerbated with any increase in the distance the data must travel. This data transfer and its associated obstacles could be eliminated by the use of emerging non-volatile resistive memory technologies (memristors) that make it possible to both store and process data within the same memory cells. In this paper, we propose four in-memory algorithms for efficient execution of fixed point multiplication using MAGIC gates. These algorithms achieve much better latency and throughput than a previous work and significantly reduce the area cost. They can thus be feasibly implemented inside the size-limited memory arrays. We use these fixed point multiplication algorithms to efficiently perform more complex in-memory operations such as image convolution and further show how to partition large images to multiple memory arrays so as to maximize the parallelism. All the proposed algorithms are evaluated and verified using a cycle-accurate and functional simulator. Our algorithms provide on average 200x better performance over state-of-the-art APIM, a processing in-memory architecture for data intensive applications.

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