Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume 65, Issue 7, Pages 2169-2182Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2017.2777872
Keywords
Calibration scheme; capacitance-to-digital converter; oversampled Delta Sigma modulation; zero-crossing-based circuits
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Funding
- National Natural Science Foundation of China [61504086]
- Natural Science Foundation of Guangdong Province, China [2016A030310057]
- Shenzhen Science and Technology Development Funds [JCYJ20150626090521275]
- Natural Science Foundation of Shenzhen University [827000098]
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Conventional capacitance-to-digital converters (CDCs) suffer limitations either on narrow capacitance range or low resolution for jitter-induced noise and high power consumption. In order to avoid these limitations, a 13-b 1 pF-10 nF generic CDC is presented. In the proposed CDC with the oversampled Delta Sigma modulation, the zero-crossing-based circuits (ZCBCs) are used to replace the operational transconductance amplifier to avoid feedback loop stability issues. However, the ZCBCs inevitably incur the non-idealities and thus, a novel calibration scheme is presented for efficient non-ideality-error cancellation. In addition, for the purpose of making the proposed CDC sufficiently intelligent to adapt to a wide capacitance-sensing range, an adaptive auto-range mechanism is proposed. The above three techniques complement each other and work as a whole leading to the proposed CDC with wide range, high resolution, high linearity, and low power consumption. A prototype fabricated using 0.18-mu m CMOS technology is experimentally verified using a MEMS capacitive humidity sensor. The measurement results show that the CDC achieves a 13-b root-mean-square noise equivalent resolution with a 128-mu s conversion time and a 230 fJ/conversion-step figure of merit. The calibration scheme enhances the linearity from 7 to 11.4 b in the 1 pF-10 nF compatible capacitance range.
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