Monolithic technology for silicon nanowires in high-topography architectures

Published 2017 View Full Article

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Title
Monolithic technology for silicon nanowires in high-topography architectures
Authors
Keywords
Silicon nanowire, 3D integrated circuit, 3D integration, Top-down fabrication, Trench isolation
Journal
MICROELECTRONIC ENGINEERING
Volume 183-184, Issue -, Pages 42-47
Publisher
Elsevier BV
Online
2017-10-13
DOI
10.1016/j.mee.2017.10.001

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