Impact of phase-locked loop on small-signal dynamics of the line commutated converter-based high-voltage direct-current station

This study investigates the impact of phase-locked loop (PLL) and DC-side voltage controller on small-signal dynamics of the high-voltage direct-current (HVDC) inverter station system which utilises line commutated converter (LCC) technology. The studies are conducted based on eigenanalysis of a linearised model of a study system and verified by time-domain simulation studies in the PSCAD platform. The studies show that under weak grid conditions, e.g. short-circuit ratio (SCR)=1, parameters of PLL and DC-side voltage controller of the LCC-HVDC station can highly impact the damping of the oscillatory modes and even cause instability. The studies also show that the voltage control parameters can be selected to prevent PLL-induced instability. The studies also (i) show that maximum available power and critical SCR are highly affected by PLL and DC-side voltage control and (ii) propose a procedure to systematically determine these indices.