Article
Engineering, Electrical & Electronic
Soumitra Pal, Dodla Divya Sri, Wing-Hung Ki, Aminul Islam
Summary: A radiation hardened memory-by-design 10T (RHMD10T) SRAM cell is proposed as a solution to the increased susceptibility to soft-errors in space, showing better read delay, stability, and lower hold power consumption compared to other contemporary cells. However, it comes at a cost of slightly longer write delay and lower write ability in comparison to other cells.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
(2021)
Article
Chemistry, Analytical
Subin Kim, Jun-Eun Park
Summary: This paper presents a pseudo-static gain cell (PS-GC) with extended retention time for an embedded dynamic random-access memory (eDRAM) macro for analog processing-in-memory (PIM). The proposed design improves the area efficiency of eDRAM-based analog PIMs by eliminating the need for bulky capacitors and utilizing pseudo-static leakage compensation. The PS-GC can maintain stored data without charge loss issue and offers unlimited retention time in a deep-submicron process.
Article
Computer Science, Information Systems
Azam Seyedi, Snorre Aunet, Per Gunnar Kjeldsberg
Summary: In this paper, the authors propose two highly reliable radiation hardened SRAM cells, the Nwise cell and the Pwise cell, designed with 28nm FD-SOI technology. Through comprehensive simulations, it is shown that both cells are competitive options for space applications, with high tolerance to Single Event Upsets (SEU) and Multi Event Upsets (MEU).
Article
Computer Science, Information Systems
Esteban Garzon, Adam Teman, Marco Lanuzza
Summary: This work analyzes three embedded memory technologies' performance at extremely low temperatures. The study finds that gain-cell embedded DRAM exhibits significant benefits, while six-transistor static random-access memory shows slight improvements, and non-volatile spin-transfer torque magnetic random access memory has higher read voltage sensing margins.
Article
Computer Science, Hardware & Architecture
Na Bai, Xin Xiao, Yaohua Xu, Yi Wang, Liang Wang, Xinjie Zhou
Summary: As technology advances, the susceptibility of SRAM cells to soft errors in the aerospace industry becomes a concern. This article proposes a Soft-Error-Aware 16T (S8P8N) SRAM cell for aerospace applications, which can quickly recover from soft errors and multinode upsets. Compared with other cells, it has slightly reduced write and read speeds, but improved hold power and read static noise margin.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
(2023)
Article
Computer Science, Information Systems
Pushpa Raikwal, Prashant Kumar, Meena Panchore, Pushpendra Dwivedi, Kanchan Cecil
Summary: In this paper, a soft-error-aware radiation-hardened 6T SRAM cell is implemented using germanium-based dopingless tunnel FET (Ge DLTFET). The RHBD technique is employed to mitigate the effect of soft error. The Ge DLTFET-based SRAM cell design performs better in terms of delay, stability, static power noise margin, and write trip power values compared to the conventional Si TFET-based SRAM cell.
Article
Engineering, Electrical & Electronic
Yinghuan Lv, Qing Wang, Hao Ge, Tiantian Xie, Jing Chen
Summary: This paper introduces a new Radiation Hardened By Design (RHBD) 8T SRAM cell that can withstand single event upset (SEU) in a radiation environment. Simulation results and pulsed laser testing show that the proposed cell has a higher critical charge and energy threshold compared to conventional 6T SRAM cell and other RHBD SRAM cells, while also being insensitive to total ionizing dose (TID) effects.
MICROELECTRONICS RELIABILITY
(2021)
Article
Chemistry, Analytical
Chenyu Yin, Tianzhi Gao, Hao Wei, Yaolin Chen, Hongxia Liu
Summary: In this paper, the single event effect of 6T-SRAM is simulated at circuit level and device level based on a 22 nm fully depleted silicon-on-insulator (FDSOI) process, taking into account the effects of charge sharing and bipolar amplification in device-level simulation. The results show that the combined influence of these two effects leads to a decrease in the circuit's upset threshold and critical charge by 15.4% and 23.5%, respectively. It is concluded that the charge sharing effect exacerbates the single event effects. By analyzing the incident conditions of two different incident radius particles, it is found that particles with a smaller incident radius have a worse impact on the SRAM circuit and are more likely to cause single event upset, indicating that the ionization distribution generated by the incident particle affects charge collection.
Article
Nuclear Science & Technology
Ze He, Shi-Wei Zhao, Tian-Qi Liu, Chang Cai, Xiao-Yu Yan, Shuai Gao, Yu-Zhu Liu, Jie Liu
Summary: Through experimental studies, it was found that the SEU radiation threshold of a 1 KB storage block with EDAC code is higher than that of a 4 KB storage block. In a high LET "Ta-Tantalum" ion irradiation test, the benefits of the EDAC code are significantly reduced due to the increased proportion of multi-bit upsets in the SEU.
NUCLEAR SCIENCE AND TECHNIQUES
(2021)
Article
Engineering, Electrical & Electronic
Na Bai, Zihan Chen, Yaohua Xu, Yi Wang, Yueliang Zhou, Zeyuan Lin
Summary: In this paper, a novel radiation-hardened memory cell PRF-18T is proposed, which reduces the number of sensitive nodes and can effectively tolerate single event upset and double node upset. Compared with other memory cells in a simulation environment, PRF-18T has a higher critical charge value and significant improvement in high hold static noise margin and write static noise margin.
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
(2023)
Article
Mathematical & Computational Biology
Yu Xie, Tingting Qiao, Yizhuang Xie, He Chen
Summary: This study proposes a brain-inspired hybrid-grained scrubbing mechanism to mitigate and repair soft errors in SRAM-based FPGAs. The mechanism achieves precise error location and recovery, and outperforms counterpart approaches in error recovery time and hardware overhead.
FRONTIERS IN COMPUTATIONAL NEUROSCIENCE
(2023)
Article
Computer Science, Information Systems
Alexander Aponte-Moreno, Felipe Restrepo-Calle, Cesar Pedraza
Summary: The proposal combines approximate computing techniques with radiation-induced mitigation strategies to design fault-tolerant systems with minimal overheads. Experimental results show that the performance of the system can be improved, even completely counteracting the overheads of redundancy.
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING
(2021)
Article
Computer Science, Hardware & Architecture
Na Bai, Yueliang Zhou, Yaohua Xu, Yi Wang, Zihan Chen
Summary: In this paper, a new highly stable soft-error immune SRAM cell with multi-node upset recovery (SIMR-18 T) is proposed. It outperforms other structures in terms of read and write access time, static noise margin, and critical charge.
INTEGRATION-THE VLSI JOURNAL
(2023)
Article
Engineering, Electrical & Electronic
Vahid Bakhtiary, Abdolah Amirany, Mohammad Hossein Moaiyeri, Kian Jafari
Summary: Ternary logic has been studied for its potential advantages in reducing complexity and interconnects. This paper proposes a robust ternary SRAM (TSRAM) cell using a novel ternary C-element based on carbon nanotube field-effect transistors (CNTFETs). A 2mx2n ternary memory array architecture is also designed and simulated. The proposed TSRAM is radiation-hardened and robust, offering higher critical charge and SNM with minimal area overhead and only requiring two threshold voltages.
MICROELECTRONICS RELIABILITY
(2023)
Article
Computer Science, Information Systems
Mohaddaseh Nikseresht, Jens Vankeirsbilck, Jeroen Boydens
Summary: This article analyzes various criteria for effectively implementing selective hardening against soft errors through software-based strategies. The analysis is conducted based on two important phases: pre-selection and selective hardening of registers. The results indicate that selecting registers based on fault injection has a better performance compared to selecting registers based on memory interaction. Increasing the number of protected registers improves reliability but also increases overhead.
Article
Engineering, Electrical & Electronic
Esteban Garzon, Raffaele De Rose, Felice Crupi, Mario Carpentieri, Adam Teman, Marco Lanuzza
Summary: STT-MRAM based on double-barrier magnetic tunnel junction with two reference layers shows faster read access and lower energy consumption at cryogenic temperatures, outperforming conventional 6T-SRAM, especially for medium to large memory sizes.
IEEE TRANSACTIONS ON MAGNETICS
(2021)
Article
Computer Science, Hardware & Architecture
Esteban Garzon, Yosi Greenblatt, Odem Harel, Marco Lanuzza, Adam Teman
Summary: The study explores the design of GC-eDRAM under cryogenic conditions, finding that configurations based on two transistors are the best solution for ultra-low temperature operation, showing improvements in terms of data retention time and power consumption compared to more complex topologies. Additionally, significant improvements in area, leakage power, retention power, and energy are observed when compared to conventional 6T-SRAM.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
(2021)
Article
Engineering, Electrical & Electronic
Asaf Avnon, Roman Golman, Esteban Garzon, Ha-Duong Ngo, Marco Lanuzza, Adam Teman
Summary: Graphene nanoribbons as an emerging technology are poised to challenge semiconductor technology, with a model extension and study on the impact of quantum capacitance on graphene nanoribbon field-effect transistors showing significant influence on transient behavior in circuit design through simulation results.
SOLID-STATE ELECTRONICS
(2021)
Article
Computer Science, Information Systems
Esteban Garzon, Adam Teman, Marco Lanuzza
Summary: This work analyzes three embedded memory technologies' performance at extremely low temperatures. The study finds that gain-cell embedded DRAM exhibits significant benefits, while six-transistor static random-access memory shows slight improvements, and non-volatile spin-transfer torque magnetic random access memory has higher read voltage sensing margins.
Article
Engineering, Electrical & Electronic
Esteban Garzon, Raffaele De Rose, Felice Crupi, Lionel Trojman, Adam Teman, Marco Lanuzza
Summary: This study investigates the impact of thermal stability relaxation in DMTJs on the energy efficiency of STT-MRAMs operating at 77 K. The results show that by reducing the cross-section area and relaxing the non-volatility requirement of DMTJ devices, energy-efficient embedded memories can be achieved.
SOLID-STATE ELECTRONICS
(2022)
Article
Computer Science, Hardware & Architecture
Esteban Garzon, Adam Teman, Marco Lanuzza, Leonid Yavits
Summary: This work presents an associative in-memory deep learning processor (AIDA) for edge devices, which achieves high efficiency and low energy consumption by utilizing dynamic content addressable memory for data storage and processing.
Article
Engineering, Electrical & Electronic
Esteban Garzon, Marco Lanuzza, Adam Teman, Leonid Yavits
Summary: In-memory computing reduces data movement and addresses the memory wall by performing computations in the same location as the data. This paper introduces AM4, a design that combines STT-MTJ-based CAM, TCAM, ACAM, and in-memory AP inspired by Samsung MRAM crossbar. The study demonstrates the superior performance (with an average speedup of 10x) and energy-efficiency (around 60x improvement on average) of the AM4-based AP over existing solutions.
IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
(2023)
Article
Engineering, Electrical & Electronic
Esteban Garzon, Roman Golman, Marco Lanuzza, Adam Teman, Leonid Yavits
Summary: This brief introduces a novel sensing approach for approximate matching content-addressable memory (CAM) that can handle large Hamming distances (HDs) between the query pattern and stored data. The proposed matchline sensing scheme (MLSS) uses a replica mechanism and a 12-transistor positive feedback sense amplifier. Experimental measurements demonstrate the high sensitivity and efficiency of the MLSS in tolerating very large HDs.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
(2023)
Article
Computer Science, Information Systems
Esteban Garzon, Leonid Yavits, Giovanni Finocchio, Mario Carpentieri, Adam Teman, Marco Lanuzza
Summary: In this paper, an energy-efficient, reliable, hybrid, 10-transistor/2-Double-Barrier-Magnetic-Tunnel-Junction (10T2DMTJ) non-volatile ternary content-addressable memory (TCAM) with sub-nanosecond search operation is proposed. The cell design utilizes low-energy-demanding MTJs organized in a low-complexity voltage-divider-based circuit along with a simple dynamic logic CMOS matching network to improve search reliability. The proposed NV-TCAM achieves lower search error rate, reduced write and search energy, and smaller area footprint compared to previous solutions, albeit at the expense of reduced search speed.
Article
Engineering, Electrical & Electronic
Inbal Stanger, Noam Roknian, Netanel Shavit, Yonatan Shoshan, Yoav Weizman, Adam Teman, Edoardo Charbon, Alexander Fish
Summary: Dynamic logic is reconsidered for high-performance and energy-efficient circuits in cryogenic operation, showcasing improved performance and power efficiency compared to CMOS technology.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
(2023)
Article
Engineering, Electrical & Electronic
Yehuda Kra, Yonatan Shoshan, Yehuda Rudin, Adam Teman
Summary: This paper presents HAMSA-DI, an energy-efficient embedded RISC-V core with a small footprint and a dual-issue processing pipeline. It supports popular Xpulp extensions and provides a significant performance boost and improved energy-efficiency over baseline low-power cores.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
(2023)
Proceedings Paper
Computer Science, Hardware & Architecture
Robert Hanhan, Esteban Garzon, Zuher Jahshan, Adam Teman, Marco Lanuzza, Leonid Yavits
Summary: This article proposes a novel edit distance-tolerant content addressable memory (EDAM) for energy-efficient approximate search applications. It introduces the design, evaluation, and functionality of EDAM, and highlights its significant improvement in DNA classification compared to state-of-the-art tools.
PROCEEDINGS OF THE 2022 THE 49TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA '22)
(2022)
Article
Computer Science, Hardware & Architecture
Odem Harel, Emmanuel Nieto Casarrubias, Manuel Eggimann, Frank Gurkaynak, Luca Benini, Adam Teman, Robert Giterman, Andreas Burg
Summary: GC-eDRAM is an attractive alternative to traditional 6T SRAM, offering higher density, lower leakage power, and two-ported functionality. This letter presents a GC-eDRAM architecture designed to overcome the refresh disadvantages and improve memory availability. The use of a read-before-write mechanism and 3T-1C bitcells with a replica bit line enhances performance and power consumption.
IEEE SOLID-STATE CIRCUITS LETTERS
(2022)
Article
Computer Science, Information Systems
Esteban Garzon, Roman Golman, Zuher Jahshan, Robert Hanhan, Natan Vinshtok-Melnik, Marco Lanuzza, Adam Teman, Leonid Yavits
Summary: This paper proposes a novel Hamming distance tolerant content-addressable memory (HD-CAM) for energy-efficient in-memory approximate matching applications. HD-CAM utilizes matchline charge redistribution for approximate search, enabling robust operation under process variations and changes in design parameters.
Proceedings Paper
Computer Science, Artificial Intelligence
Yehuda Kra, Tzachi Noy, Adam Teman
Summary: The CWPP approach offers a more efficient and area-saving alternative to traditional pipelined logic, but its implementation complexity and lack of a robust design methodology meeting industry standards have limited its use in modern technologies.
PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021)
(2021)
