4.7 Article

Theoretical and experimental study of a thermal damper based on a CNT/PCM composite structure for transient electronic cooling

Journal

ENERGY CONVERSION AND MANAGEMENT
Volume 142, Issue -, Pages 257-271

Publisher

PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.enconman.2017.03.034

Keywords

Vertically aligned carbon nanotubes; Phase change material; Thermal energy storage; Interfacial thermal resistance; Transient electronic cooling

Funding

  1. ANR P2N THERMA3D project [ANR-11-NANO-011]

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The present study focuses on a thermal damper that aims at smoothing the temperature peaks experienced by electronic components during transient solicitations. It consists of a silicon casing containing a densified or undensified carbon nanotube (CNT) array- linking directly both sides of the system- filled with phase change material (PCM). Theoretical consideration enables to define the concept of ideal thermal damper in order to study the foreseeable performance of this kind of system. Its thermal effectiveness can be predicted by means of two non-dimensional numbers, linked to the thermal capacity of the system and to the latent heat of the PCM. A numerical model shows that the behavior of a non ideal thermal damper can differ from that of an ideal thermal damper: it is mostly affected by the thermal resistance at the interface between the silicon and the CNT and the temperature glide during the PCM phase change. To complete the study, prototypes of thermal dampers are experimentally characterized, in terms of heat storage and heat conduction performance. An estimation method of the total apparent thermal capacity of the tested sample is developed in order to quantify its latent heat storage capacity. The latent energy storage density is 1.6 J cm(-2) for the best sample and is observed to be preserved after 850 thermal cycles. The total thermal resistance of the thermal damper is estimated by means of a laser flash test and a simple model of the sample. Sensitivity analyses show that the main thermal resistances are located at the interfaces between silicon and CNT. (C) 2017 Elsevier Ltd. All rights reserved.

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