Article
Physics, Applied
Shota Nunomura, Hiroyuki Ota, Toshifumi Irisawa, Kazuhiko Endo, Yukinori Morita
Summary: The defect generation and recovery in a high-k HfO2/SiO2/Si stack for MOSFETs were studied at each fabrication step. The measurements of carrier lifetime indicated that defects were generated during the formation of the HfO2/SiO2 stack, as well as post-deposition annealing (PDA) and O-2 plasma treatment, while they were mostly recovered by forming gas annealing (FGA).
APPLIED PHYSICS EXPRESS
(2023)
Article
Chemistry, Physical
Minhyuk Kim, Moonsuk Choi, Juhyeon Lee, Weinan Jin, Changhwan Choi
Summary: The study revealed that the use of different capping metals (aluminum or tungsten) affects the EWF value of ALD TaN, which in turn affects the choice of device type.
APPLIED SURFACE SCIENCE
(2022)
Article
Chemistry, Physical
Sandeep Kumar, Arun Kumar Chatterjee, Rishikesh Pandey
Summary: The study compared the performance of conventional and recessed double-gate junctionless FETs, finding that the recessed structure can further improve device performance. Within the appropriate work function window, both junctionless devices exhibit good transconductance and subthreshold characteristics.
Article
Chemistry, Physical
Prashant Kumar, Munish Vashisht, Neeraj Gupta, Rashmi Gupta
Summary: This paper explores the subthreshold current of SD-TM-CGAA Junctionless MOSFET and its application in CMOS inverter, comparing it to TMSG MOSFET with good agreement. The design of a CMOS inverter with matched drive currents for PMOS and NMOS transistors yielded ideal results. The proposed device showed a significant reduction in power dissipation compared to CMOS DMG-SOI JLT inverter, demonstrating excellent potential for low-power future generation devices.
Article
Multidisciplinary Sciences
Bhawna Aggarwal, Aakriti Chhabra, Swati Yadav
Summary: This paper presents a high-performance SD circuit designed using MTL transistors and FVF cell, and proposes a low voltage SD circuit with improved performance by replacing MOSFETs. The use of a compensating resistor for further bandwidth enhancement is also introduced, and corner and temperature analysis are conducted. The practical usability of the proposed circuits is demonstrated by implementing a low voltage RMS-to-DC converter.
ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING
(2022)
Article
Computer Science, Information Systems
Naveenbalaji Gowthaman, Viranjay M. Srivastava
Summary: The research focuses on designing cylindrical structures for low-frequency RF applications, using high-resolution morphological structures and high-k dielectric materials for CSDG MOSFETs. Modeling of complex heterostructures is achieved through the fast modulation of Single Nano Wire (SNW), effectively overcoming the Short Channel Effects (SCEs).
Review
Chemistry, Multidisciplinary
Karanam Haritha, B. Lakshmi
Summary: This study provides a systematic review of junctionless tunnel field effect transistor (JLTFET)-based homo- and hetero-based devices/circuits, demonstrating improved performance in terms of both DC and AC parameters compared to traditional FETs.
JOURNAL OF NANOPARTICLE RESEARCH
(2021)
Article
Engineering, Electrical & Electronic
Keisuke Yamamoto, Takuro Matsuo, Michihiro Yamada, Youya Wagatsuma, Kentaro Sawano, Kohei Hamaya
Summary: This study demonstrates the electrical properties of a Ge-based top-gate metal-oxide-semiconductor field-effect transistor (MOSFET) structure with epitaxial ferromagnetic Heusler alloy/Ge Schottky-tunnel contacts. The MOSFET is fabricated using a low-temperature gate-stack process and a combination process of Ar+ ion milling and reactive ion etching (RIE) to shape the Ge-MOSFET with ferromagnetic source and drain contacts. The study shows inversion channel MOSFETs with low gate-voltage operation and relatively high field-effect mobility compared to previous Si-based spin-MOSFETs, indicating the potential for developing Ge-based top-gate spin-MOSFETs on the Si platform.
MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING
(2023)
Article
Engineering, Electrical & Electronic
Ming Qiao, Tao Ma, Shida Dong, Zhengkang Wang, Shuhao Zhang, Zhaoji Li, Bo Zhang
Summary: A high-performance field-plate trench MOSFET with a hollow split gate structure is proposed in this paper. By reducing the overlap of the control gate to the split gate, the parasitic gate capacitance and gate charge are significantly reduced without altering the control gate structure. Numerical simulation results show that the proposed device can reduce gate-source charge and gate charge while maintaining breakdown voltage and specific on-resistance. Moreover, the average total power loss of the proposed device is reduced compared to the conventional one.
MICROELECTRONICS JOURNAL
(2022)
Article
Computer Science, Information Systems
Naveenbalaji Gowthaman, Viranjay M. Srivastava
Summary: The research focuses on an analytical model of the lightly doped Cylindrical Surrounding Double-Gate (CSDG) MOSFET and its capacitive modeling. Results show that the inclusion of 2D electron gas in the core of CSDG MOSFET increases the transconductance value significantly. This novel model occupies less area on the board, making routing more accessible, and is suitable for high-frequency/RF applications.
Article
Chemistry, Physical
Madhu Kushwaha, Arun Kumar Chatterjee, B. Prasad, A. K. Chatterjee, Alpana Agarwal
Summary: An analytical model for gate tunneling current in a nanoscale double gate metal oxide semiconductor field effect transistor has been developed, which provides a simple and generalized approach based on earlier work on single gate MOSFETs. By considering the potential distribution and contributions from inversion and depletion charges, the model accurately estimates the tunneling current density.
Article
Physics, Multidisciplinary
Krutideepa Bhol, Umakanta Nanda, Biswajit Jena, Shubham Tayal, Sudhansu M. Biswal
Summary: This paper describes a continuous and almost linearly modulated work-function adjustment using Hf-Mo binary alloy, and applies it to a gate all around MOSFET (GAA) for better electrostatic control. The threshold voltage is tuned by linearly modulating the gate metal work function, resulting in improved device performance and reduced short channel effect.
Article
Engineering, Electrical & Electronic
Pritha Banerjee, Jayoti Das
Summary: This research paper presents the device characteristics of a dual-material gate-graded Channel macaroni MOSFET through analytical modeling and simulation. It investigates the influence of localized interface trapped charges within a temperature range of 100-500 K. The research demonstrates the dependency of the device's inner potential and threshold voltage on the inherent macaroni features and highlights the advantages offered by the proposed device over other contemporary devices in terms of suppressing short-channel effects and achieving suitable tuning of threshold voltage.
JOURNAL OF ELECTRONIC MATERIALS
(2022)
Article
Engineering, Electrical & Electronic
Fu-Chien Chiu, Wei-Chia Chen, Jih-Huah Wu, Kuei-Shu Chang-Liao
Summary: In this study, p-channel MOSFETs with ZrO2/Al2O3/GeO2 high-k gate stack on n-Ge substrate were fabricated and examined for interface state generation and hole trapping during voltage stresses. The results showed that hole trapping initially caused threshold voltage shift, but over time interface states became the dominant factor. The characteristic time for this transition was found to be independent of stress voltage at approximately 10^6 seconds.
MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING
(2021)
Article
Chemistry, Multidisciplinary
Sayed Md Tariful Azam, Abu Saleh Md Bakibillah, Md Tanvir Hasan, Md Abdus Samad Kamal
Summary: This study theoretically investigated the influence of step gate work function on the InGaAs p-TFET device with a dual material gate. The device's performance was found to vary with different gate work function differences, potentially impacting future low-power digital and analog applications.
