Simulation-based study of negative capacitance double-gate junctionless transistors with ferroelectric gate dielectric

Title
Simulation-based study of negative capacitance double-gate junctionless transistors with ferroelectric gate dielectric
Authors
Keywords
Junctionless transistor, Ferroelectric gate dielectric, Negative capacitance, Power dissipation applications, Numerical simulation
Journal
SOLID-STATE ELECTRONICS
Volume 126, Issue -, Pages 130-135
Publisher
Elsevier BV
Online
2016-09-13
DOI
10.1016/j.sse.2016.09.001

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