Heteroepitaxial Writing of Silicon-on-Sapphire Nanowires

The heteroepitaxial growth of crystal silicon thin films on sapphire, usually referred to as SoS, has been a key technology for high-speed mixed-signal integrated circuits and processors. Here, we report a novel nanoscale SoS heteroepitaxial growth that resembles the in-plane writing of self-aligned silicon nanowires (SiNWs) on R-plane sapphire. During a low temperature growth at <350 degrees C, compared to that required for conventional SoS fabrication at >900 degrees C, the bottom heterointerface cultivates crystalline Si pyramid seeds within the catalyst droplet, while the vertical SiNW/catalyst interface subsequently threads the seeds into continuous nanowires, producing self-oriented in-plane SiNWs that follow a set of crystallographic directions of the sapphire substrate. Despite the low-temperature fabrication process, the field effect transistors built on the SoS-SiNWs demonstrate a high on/off ratio of >5 x 10(4) and a peak hole mobility of >50 cm(2)/V-s. These results indicate the novel potential of deploying in-plane SoS nanowire channels in places that require high-performance nanoelectronics and optoelectronics with a drastically reduced thermal budget and a simplified manufacturing procedure.