Efficient implementation of a DSIG-JLT-based multiplexer and demultiplexer using different logic styles at 20-nm technology

Title
Efficient implementation of a DSIG-JLT-based multiplexer and demultiplexer using different logic styles at 20-nm technology
Authors
Keywords
-
Journal
Journal of Computational Electronics
Volume -, Issue -, Pages -
Publisher
Springer Science and Business Media LLC
Online
2023-10-13
DOI
10.1007/s10825-023-02099-5

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