A robust low-power fsm cordic lms filter design for exponential noise removal in pacemaker

Fully Automated Hardware-Driven Clock-Gating Architecture With Complete Clock Coverage for 4 nm Exynos Mobile SOC

(2022) Jae-Gon Lee et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

CNTFET Circuit-Based Wide Fan-In Domino Logic for Low Power Applications

(2021) Vijay Kumar Sharma   JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS

Design and analysis of INDEP FinFET SRAM cell at 7‐nm technology

(2020) Umayia Mushtaq et al.   INTERNATIONAL JOURNAL OF NUMERICAL MODELLING-ELECTRONIC NETWORKS DEVICES AND FIELDS

Design of low power 16-bit counter with Programmable Combinational Logic and Integrated Clock Gating using 16-nm technology

(2020) S Mohamed Sulaiman et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

Hybrid buffers based coarse-grained power gated network on chip router microarchitecture

(2019) Yogendra Gupta et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

Variation aware intuitive clock gating to mitigate on-chip power supply noise

(2018) Alak Majumder et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

Activity correlation-based clustering clock-gating technique for digital filters

(2017) Q. Tong et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

Design of Low Leakage Variability Aware ONOFIC CMOS Standard Cell Library

(2016) Vijay Kumar Sharma et al.   JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS

Analysis of power gating in different hierarchical levels of 2MB cache, considering variation

(2015) Mohsen Jafari et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

Low-cost and low-power unidirectional torus network-on-chip with corner buffer power-gating

(2015) Feng Wang et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

VLSI implementation of a new LMS-based algorithm for noise removal in ECG signal

(2015) S. Satheeskumaran et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

A reliable ground bounce noise reduction technique for nanoscale CMOS circuits

(2015) Vijay Kumar Sharma et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

Enhanced ground bounce noise reduction in a low-leakage CMOS multiplier

(2014) Bipin Kumar Verma et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

TECHNIQUES FOR LOW LEAKAGE NANOSCALE VLSI CIRCUITS: A COMPARATIVE STUDY

(2014) VIJAY KUMAR SHARMA et al.   JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS

High Performance Process Variations Aware Technique for Sub-threshold 8T-SRAM Cell

(2014) Vijay Kumar Sharma et al.   WIRELESS PERSONAL COMMUNICATIONS

Area-Delay-Power Efficient Fixed-Point LMS Adaptive Filter With Low Adaptation-Delay

(2013) Pramod Kumar Meher et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

PVT variations aware low leakage INDEP approach for nanoscale CMOS circuits

(2013) Vijay Kumar Sharma et al.   MICROELECTRONICS RELIABILITY