LUT‐DSP usage trade‐off for re‐configurable convolution acceleration core based on small logarithmic floating point representation

Published 2023 View Full Article

  1. Home
  2. Publications
  3. Publication Search
  4. Publication Details
Title
LUT‐DSP usage trade‐off for re‐configurable convolution acceleration core based on small logarithmic floating point representation
Authors
Keywords
-
Journal
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
Volume -, Issue -, Pages -
Publisher
Wiley
Online
2023-10-24
DOI
10.1002/cta.3834
References
View 5 related references

Ask authors/readers for more resources

Protocol

Community support

Reagent

Community support

Reprint

Contact the author

Discover Peeref hubs

Discuss science. Find collaborators. Network.

Join a conversation

Publish scientific posters with Peeref

Peeref publishes scientific posters from all research disciplines. Our Diamond Open Access policy means free access to content and no publication fees for authors.

Learn More
Webinars Posters Questions Hubs Funding Journals Articles Connect Collections Reviewers About Us FAQs Mobile App Privacy Policy Terms of Use
© Peeref 2019-2024. All rights reserved.