A compute-in-memory chip based on resistive random-access memory

A crossbar array of magnetoresistive memory devices for in-memory computing

(2022) Seungchul Jung et al.   NATURE

TxSim: Modeling Training of Deep Neural Networks on Resistive Crossbar Systems

(2021) Sourjya Roy et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Fully On-Chip MAC at 14 nm Enabled by Accurate Row-Wise Programming of PCM-Based Weights and Parallel Vector-Transport in Duration-Format

(2021) P. Narayanan et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

A four-megabit compute-in-memory macro with eight-bit precision based on CMOS and resistive random-access memory for AI edge devices

(2021) Je-Min Hung et al.   Nature Electronics

Fully hardware-implemented memristor convolutional neural network

(2020) Peng Yao et al.   NATURE

A 0.32–128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm

(2020) Brian Zimmer et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Accurate deep neural network inference using computational phase-change memory

(2020) Vinay Joshi et al.   Nature Communications

A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices

(2020) Cheng-Xin Xue et al.   Nature Electronics

Towards artificial general intelligence with hybrid Tianjic chip architecture

(2019) Jing Pei et al.   NATURE

Next-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)—Part II: Design Guidelines for Device, Array, and Architecture

(2019) Zizhen Jiang et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Equivalent-accuracy accelerated neural-network training using analogue memory

(2018) Stefano Ambrogio et al.   NATURE

UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit Precision

(2018) Jinmook Lee et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks

(2017) Yu-Hsin Chen et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Sparse coding with memristor networks

(2017) Patrick M. Sheridan et al.   Nature Nanotechnology

Face classification using electronic synapses

(2017) Peng Yao et al.   Nature Communications

Training a Probabilistic Graphical Model With Resistive Switching Electronic Synapses

(2016) Sukru Burc Eryilmaz et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element

(2015) Geoffrey W. Burr et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Training and operation of an integrated neuromorphic network based on metal-oxide memristors

(2015) M. Prezioso et al.   NATURE

Deep learning

(2015) Yann LeCun et al.   NATURE

Mismatch Characterization of Small Metal Fringe Capacitors

(2014) Vaibhav Tripathi et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A 2.8 GS/s 44.6 mW Time-Interleaved ADC Achieving 50.9 dB SNDR and 3 dB Effective Resolution Bandwidth of 1.5 GHz in 65 nm CMOS

(2013) Dušan Stepanovic et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Pattern classification by memristive crossbar circuits using ex situ and in situ training

(2013) Fabien Alibart et al.   Nature Communications

High precision tuning of state for memristive devices by adaptable variation-tolerant algorithm

(2012) Fabien Alibart et al.   NANOTECHNOLOGY

Metal–Oxide RRAM

(2012) H.-S. Philip Wong et al.   PROCEEDINGS OF THE IEEE