A 7.3-μ W 13-ENOB 98-dB SFDR Noise-Shaping SAR ADC With Duty-Cycled Amplifier and Mismatch Error Shaping

An Area-Efficient SAR ADC With Mismatch Error Shaping Technique Achieving 102-dB SFDR 90.2-dB SNDR Over 20-kHz Bandwidth

(2021) Chuanshi Yang et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

A 90-dB-SNDR Calibration-Free Fully Passive Noise-Shaping SAR ADC With 4× Passive Gain and Second-Order DAC Mismatch Error Shaping

(2021) Jiaxin Liu et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 13.8-ENOB Fully Dynamic Third-Order Noise-Shaping SAR ADC in a Single-Amplifier EF-CIFF Structure With Hardware-Reusing kT/C Noise Cancellation

(2021) Tzu-Han Wang et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 103-dB SFDR Calibration-Free Oversampled SAR ADC With Mismatch Error Shaping and Pre-Comparison Techniques

(2021) Yuting Shen et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

An Energy-Efficient Comparator With Dynamic Floating Inverter Amplifier

(2020) Xiyuan Tang et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier

(2020) Xiyuan Tang et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A Cascaded Noise-Shaping SAR Architecture for Robust Order Extension

(2020) Lu Jie et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Recent Advances and Trends in Noise Shaping SAR ADCs

(2020) Gerardo Molina Salgado et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

A Discrete-Time Audio $\Delta\Sigma$ Modulator Using Dynamic Amplifier With Speed Enhancement and Flicker Noise Reduction Techniques

(2019) Song Ma et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A Capacitively Degenerated 100-dB Linear 20–150 MS/s Dynamic Amplifier

(2018) Md Shakil Akter et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 66-dB SNDR Pipelined Split-ADC in 40-nm CMOS Using a Class-AB Residue Amplifier

(2018)   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 13-ENOB Second-Order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure

(2018) Shaolan Li et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters

(2018) Jiaxin Liu et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

An Oversampling SAR ADC With DAC Mismatch Error Shaping Achieving 105 dB SFDR and 101 dB SNDR Over 1 kHz BW in 55 nm CMOS

(2016) Yun-Shiang Shu et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

98.8% switching energy reduction in SAR ADC for bioelectronics application

(2015) Xingyuan Tong et al.   ELECTRONICS LETTERS

Noise Analysis for Comparator-Based Circuits

(2009) T. Sepke et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS