Simulation-based study of negative-capacitance double-gate tunnel field-effect transistor with ferroelectric gate stack

Title
Simulation-based study of negative-capacitance double-gate tunnel field-effect transistor with ferroelectric gate stack
Authors
Keywords
-
Journal
JAPANESE JOURNAL OF APPLIED PHYSICS
Volume 55, Issue 4S, Pages 04EB08
Publisher
Japan Society of Applied Physics
Online
2016-03-18
DOI
10.7567/jjap.55.04eb08

Ask authors/readers for more resources

Add your recorded webinar

Do you already have a recorded webinar? Grow your audience and get more views by easily listing your recording on Peeref.

Upload Now

Become a Peeref-certified reviewer

The Peeref Institute provides free reviewer training that teaches the core competencies of the academic peer review process.

Get Started