A survey of SRAM-based in-memory computing techniques and applications

As von Neumann computing architectures become increasingly constrained by data-movement overheads, researchers have started exploring in-memory computing (IMC) techniques to offset data-movement overheads. Due to the widespread use of SRAM, IMC techniques for SRAM hold the promise of accelerating a broad range of computing systems and applications. In this article, we present a survey of techniques for in-memory computing using SRAM memory. We review the use of SRAM-IMC for implementing Boolean, search and arithmetic operations, and accelerators for machine learning (especially neural networks) and automata computing. This paper aims to accelerate co-design efforts by informing researchers in both algorithm and hardware architecture fields about the recent developments in SRAM-based IMC techniques.

Automated summary

Researchers are exploring in-memory computing techniques to offset data-movement overheads as von Neumann computing architectures are increasingly constrained. The use of SRAM in IMC techniques holds promise for accelerating a broad range of computing systems and applications. This paper aims to inform researchers about recent developments in SRAM-based IMC techniques to accelerate co-design efforts.