4.6 Article

An Artificial Neural Network-Based Electrothermal Model for GaN HEMTs With Dynamic Trapping Effects Consideration

Journal

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
Volume 64, Issue 8, Pages 2519-2528

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TMTT.2016.2586055

Keywords

Ambient temperature; artificial neural network (ANN); charge models; electrothermal model; gallium nitride (GaN) HEMTs; parameter extraction; self-heating; trapping effects

Funding

  1. Singapore Ministry of Education Academic Research Fund [MOE2014-T2-2-151]
  2. National Natural Science Foundation of China [61401296]
  3. Natural Science Foundation for Youths of Jiangsu Province, China [BK20130375]
  4. Jiangsu Province Funding for Enterprise-Academic-Research Innovation Platform [BY2012229]

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A complete solution from parameter extraction to large-signal electrothermal model generation for gallium nitride (GaN) HEMTs is presented in this paper with the consideration of trapping deduced gate and drain lag effects. The extrinsic parasitic parameters are extracted by multibias hot-FET optimization using artificial bee colony algorithm. New terminal charge (Q(gs), Q(gd), and Q(ds)) models with temperature dependence are proposed to better characterize the GaN devices. Physical mechanisms of the electrothermal and trapping effects have been investigated, and the artificial neural network (ANN) is exploited to construct the drain current based on pulsed I-V (PIV) measurements. Besides the instantaneous terminal voltages, additional three auxiliary variables are employed to describe the memory effects of GaN HEMT: channel temperature, gate trapping state, and drain trapping state. These variables are identified from PIVs to compose the input layer of the ANN, while in the simulator, they are captured by the thermal and two envelop tracking subcircuits. These physical auxiliary variables together with the ANN technology enable unlimited fitting sets of PIVs with satisfying accuracy. Single-tone and two-tone on-wafer measurements are conducted for the verification, and a good agreement has been achieved between the measurements and simulations.

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