4.8 Article

Review of Fast Algorithms and Hardware Implementations on Computer Holography

Journal

IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS
Volume 12, Issue 4, Pages 1611-1622

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TII.2015.2509452

Keywords

Algorithm; computer-generated hologram (CGH); digital holography; field-programmable gate array (FPGA); graphics processing unit (GPU); holography; hologram; real-time processing

Funding

  1. Japan Society for the Promotion of Science KAKENHI (JSPS KAKENHI) [25330125, 25240015]
  2. Kayamori Foundation of Information Science Advancement
  3. Yazaki Memorial Foundation for Science and Technology
  4. Grants-in-Aid for Scientific Research [25330125] Funding Source: KAKEN

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This study reviews fast algorithms and hardware implementations of computer holography, including computer-generated holograms and digital holography. To reduce the calculation time, which is mainly consumed by diffraction calculation, fast algorithms and hardware implementations are highly necessary and will ensure the further development of this field.

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