4.6 Article

Toward Understanding Positive Bias Temperature Instability in Fully Recessed-Gate GaN MISFETs

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 63, Issue 5, Pages 1853-1860

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2016.2539341

Keywords

GaN-on-Si; MISFETs; positive bias temperature instability (PBTI); recessed gate; VTH hysteresis

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In this paper, fully recessed-gate GaN MISFETs with two different gate dielectrics, i.e., plasma-enhanced atomic layer deposition (PEALD) SiN and ALD Al2O3 gate dielectric, are used to study the origin of positive bias temperature instability (PBTI). By employing a set of dedicated stress-recovery tests, we study PBTI during the stress and relaxation. Hence, a defect band model with different distributions of defect levels inside the gate dielectric is proposed, which can excellently reproduce the experimental data and provide insightful information about the origin of PBTI in GaN MISFETs. The results indicate that the serious PBTI in the device with PEALD SiN is mainly due to a wide distribution of defect levels (sigma similar to 0.67 eV), centered below the conduction band of GaN (E-C - 0.05 eV), and can be easily accessed by the channel carriers already at a low-gate voltage. On the other hand, ALD Al2O3 gate dielectric shows a narrower distribution of defects (sigma similar to 0.42 eV), which are far from the conduction band of GaN (E-C + 1.15 eV). This observations explain the improved PBTI reliability observed in devices with ALD Al2O3.

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