Double-Gate Negative-Capacitance MOSFET With PZT Gate-Stack on Ultra Thin Body SOI: An Experimentally Calibrated Simulation Study of Device Performance

Published 2016 View Full Article

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Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES

Volume 63, Issue 12, Pages 4678-4684

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Online

2016-10-25

DOI

10.1109/ted.2016.2616035

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IEEE TRANSACTIONS ON ELECTRON DEVICES

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