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Title
Ultra-efficient adders and even parity generators in nano scale
Authors
Keywords
Nano-scale, Adder, Even parity generator, 2-dimensional clocking
Journal
COMPUTERS & ELECTRICAL ENGINEERING
Volume 96, Issue -, Pages 107548
Publisher
Elsevier BV
Online
2021-10-22
DOI
10.1016/j.compeleceng.2021.107548
References
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- USE: A Universal, Scalable, and Efficient Clocking Scheme for QCA
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- Two-Dimensional Schemes for Clocking/Timing of QCA Circuits
- (2007) V. Vankamamidi et al. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
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