4.8 Article

Three-dimensional perovskite nanowire array-based ultrafast resistive RAM with ultralong data retention

Journal

SCIENCE ADVANCES
Volume 7, Issue 36, Pages -

Publisher

AMER ASSOC ADVANCEMENT SCIENCE
DOI: 10.1126/sciadv.abg3788

Keywords

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Funding

  1. Science and Technology Plan of Shenzhen [JCYJ20170818114107730, JCYJ20180306174923335]
  2. General Research Fund from the Hong Kong Research Grant Council, Innovation Technology Fund [16309018, 16214619, GHP/014/19SZ]
  3. Guangdong-Hong Kong-Macao Intelligent Micro-Nano Optoelectronic Technology Joint Laboratory [2020B1212030010]
  4. HKUST Fund of Nanhai [FSNH-18FYTRI01]
  5. Foshan Innovative and Entrepreneurial Research Team Program [2018IT100031]
  6. Center for 1D/2D Quantum Materials
  7. State Key Laboratory of Advanced Displays and Optoelectronics Technologies at HKUST

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A study on electrochemical metallization Re-RAMs based on high-density three-dimensional halide perovskite nanowires revealed a trade-off between device switching speed and retention time.
Resistive random access memories (Re-RAMs) have transpired as a foremost candidate among emerging nonvolatile memory technologies with a potential to bridge the gap between the traditional volatile and fast dynamic RAMs and the nonvolatile and slow FLASH memories. Here, we report electrochemical metallization (ECM) Re-RAMs based on high-density three-dimensional halide perovskite nanowires (NWs) array as the switching layer clubbed between silver and aluminum contacts. NW Re-RAMs made of three types of methyl ammonium lead halide perovskites (MAPbX(3); X = Cl, Br, I) have been explored. A trade-off between device switching speed and retention time was intriguingly found. Ultrafast switching speed (200 ps) for monocrystalline MAPbI(3) and similar to 7 x 10(9) s ultralong extrapolated retention time for polycrystalline MAPbCl(3) NW devices were obtained. Further, first-principles calculation revealed that Ag diffusion energy barrier increases when lattice size shrinks from MAPbI(3) to MAPbCl(3), culminating in the trade-off between the device switching speed and retention time.

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