4.6 Review

Heteroepitaxial Growth of III-V Semiconductors on Silicon

Journal

CRYSTALS
Volume 10, Issue 12, Pages -

Publisher

MDPI
DOI: 10.3390/cryst10121163

Keywords

heteroepitaxy; monolithic integration; III-V on Si; integrated circuits (ICs); photonics integrated circuits (PICs); antiphase boundary; threading dislocation; thermal crack

Funding

  1. UK EPSRC [EP/P006973/1, EP/S024441/1, EP/T028475/1]
  2. EPSRC National Epitaxy Facility
  3. EPSRC [EP/T028475/1, EP/J012904/1, EP/P006973/1] Funding Source: UKRI

Ask authors/readers for more resources

Monolithic integration of III-V semiconductor devices on Silicon (Si) has long been of great interest in photonic integrated circuits (PICs), as well as traditional integrated circuits (ICs), since it provides enormous potential benefits, including versatile functionality, low-cost, large-area production, and dense integration. However, the material dissimilarity between III-V and Si, such as lattice constant, coefficient of thermal expansion, and polarity, introduces a high density of various defects during the growth of III-V on Si. In order to tackle these issues, a variety of growth techniques have been developed so far, leading to the demonstration of high-quality III-V materials and optoelectronic devices monolithically grown on various Si-based platform. In this paper, the recent advances in the heteroepitaxial growth of III-V on Si substrates, particularly GaAs and InP, are discussed. After introducing the fundamental and technical challenges for III-V-on-Si heteroepitaxy, we discuss recent approaches for resolving growth issues and future direction towards monolithic integration of III-V on Si platform.

Authors

I am an author on this paper
Click your name to claim this paper and add it to your profile.

Reviews

Primary Rating

4.6
Not enough ratings

Secondary Ratings

Novelty
-
Significance
-
Scientific rigor
-
Rate this paper

Recommended

No Data Available
No Data Available