Buried Power Rail Integration With FinFETs for Ultimate CMOS Scaling

Published 2020 View Full Article

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Title
Buried Power Rail Integration With FinFETs for Ultimate CMOS Scaling
Authors
Keywords
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Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 67, Issue 12, Pages 5349-5354
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2020-11-13
DOI
10.1109/ted.2020.3033510

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