Toward high-performance monolayer graphdiyne transistor: Strain engineering matters

Advanced two-dimensional (2D) semiconductors and leakage currents suppression are critical for the technology of sub-10 nm field-effect transistors (FETs). Here, by first-principles calculations, we demonstrate that graphdiyne (GDY) represents an excellent candidate of 2D semiconductors for application in sub-10 nm FETs. Importantly, strain engineering can substantially suppress the leakage current of graphdiyne transistor (GDY-FET) with underlap-free configuration by 2-4 orders of magnitude. Quantum-transport simulations reveal that pristine GDY-FET with 7.3/8.8 nm node presents ON currents of 1904/1264 mu A/mu m, while strain-engineered GDY-FET can be further scaled down to 6.1 nm with ON currents of 1335-1424 mu A/mu m, which fully meet the device-parameter requirement of the International Technology Roadmap for Semiconductors. Moreover, under 8-10% strain, the 8.8 nm GDY-FET is expected to be of both high performance and low power. The strain engineering can also reduce the subthreshold swing by 15-37% for the 5.1-8.8 nm GDY-FETs.

Automated summary

Graphdiyne is found to be a promising candidate for sub-10 nm FETs, with strain engineering significantly reducing leakage current and meeting device-parameter requirements. Quantum-transport simulations show that strain-engineered GDY-FETs can achieve high performance and low power consumption, with improved subthreshold swing.