4.2 Article

Network-on-Chip Intellectual Property Protection Using Circular Path-based Fingerprinting

Publisher

ASSOC COMPUTING MACHINERY
DOI: 10.1145/3410024

Keywords

Intellectual property protection; NoC IP protection; fingerprinting technique; polyomino

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This article introduces a circular path-based fingerprinting (CPF) technique for protecting NoC IP, which provides better security and is more efficient in terms of hardware overhead. The proposed technique does not affect data transmission latency, ensuring the performance of NoC.
Intellectual property (IP) reuse is a well-known technique in chip design industry. But this technique also exposes a security vulnerability called IP stealing attack. Network-on-Chip (NoC) is an on-chip scalable communication medium and is used as an IP and sold by various vendors to be integrated in a Multiprocessor System-on-Chip (MPSoC). An attacker can launch IP stealing attack against NoC IP. In this article, we propose a NoC IP protection technique called circular path-based fingerprinting (CPF) using fingerprint embedding. We also provide a theoretical model using polyomino theory to get the number of distinct fingerprints in a NoC. We show that our proposed technique requires much less hardware overhead compared to an existing NoC IP security solution and also provides better security against removal and masking attacks. In particular, our proposed CPF technique requires 27.41% less router area compared to the existing solution. We also show that our CPF solution does not affect the normal packet latency and hence does not degrade the NoC performance.

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