Reconfigurable on-chip interconnection networks for high performance embedded SoC design

Title
Reconfigurable on-chip interconnection networks for high performance embedded SoC design
Authors
Keywords
Reconfigurable on-chip networks, NoC router, Router and switch layers, High-performance NoCs, Network architecture and design
Journal
JOURNAL OF SYSTEMS ARCHITECTURE
Volume 106, Issue -, Pages 101711
Publisher
Elsevier BV
Online
2020-01-14
DOI
10.1016/j.sysarc.2020.101711

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