Journal
ACS APPLIED MATERIALS & INTERFACES
Volume 12, Issue 29, Pages 32943-32950Publisher
AMER CHEMICAL SOC
DOI: 10.1021/acsami.0c09060
Keywords
few-layered MoS2; vertical channel; short channel; field-effect transistors; drain-induced barrier-lowering; intrinsic delay time; subthreshold swing
Funding
- National Natural Science Foundation of China [61774064, 61974048]
- RGC of HKSAR [PolyU 252013/14E]
- University Development Fund of the Hong Kong Polytechnic University (G-YBHX)
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Few-layered molybdenum disulfide (MoS2) has demonstrated promising advantages for the integration of next-generation electronic devices. A vertical short-channel MoS2 transistor with a channel length of sub-10 nm can be realized using mica as the insulated mesa and MoS2 flake dry-transferred onto the mica as the channel. A near-perfect symmetrical and fully saturated output characteristic can be obtained for the positive or negative drain-source voltage. This result is attributed to an effective transformation of the drain-source electrode contact from Schottky contact to Ohmic contact via forming gas annealing. The vertical-channel MoS2 transistor with a channel length of 8.7 nm exhibits excellent electrical characteristics, for example, a negligible hysteresis voltage of 60 mV, an extraordinarily small subthreshold swing of 73 mV/dec, a considerably weakened drain-induced barrier-lowering effect (100 mV/V), and the first-reported intrinsic delay time of 2.85 ps. Moreover, a logic inverter can be realized using the two vertical-channel MoS2 transistors, with a high voltage gain of 33. Experimental results indicate that the developed method is a potential approach for fabricating MoS2 transistors with an ultrashort channel and high performance, and consequently, manufacturing MoS2-based integrated circuits.
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