ParRA: A Shared Memory Parallel FPGA Router Using Hybrid Partitioning Approach

Published 2019 View Full Article

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Title
ParRA: A Shared Memory Parallel FPGA Router Using Hybrid Partitioning Approach
Authors
Keywords
-
Journal
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Volume 39, Issue 4, Pages 830-842
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2019-02-23
DOI
10.1109/tcad.2019.2901243

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