Low power and area efficient error tolerant adder for image processing application

An Efficient Method for Calculating the Error Statistics of Block-based Approximate Adders

(2018) Yi Wu et al.   IEEE TRANSACTIONS ON COMPUTERS

High-performance low-power approximate Wallace tree multiplier

(2018) Sa'ed Abed et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS

High Performance Error Tolerant Adders for Image Processing Applications

(2018) R. Jothin et al.   IETE JOURNAL OF RESEARCH

High Speed Error Tolerant Adder for Multimedia Applications

(2017) S. Geetha et al.   JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS

A Survey of Techniques for Approximate Computing

(2016) Sparsh Mittal   ACM COMPUTING SURVEYS

High Performance Significance Approximation Error Tolerance Adder for Image Processing Applications

(2016) R. Jothin et al.   JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS

Approximate Computing: A Survey

(2016) Qiang Xu et al.   IEEE Design & Test

Low-Power Digital Signal Processing Using Approximate Adders

(2012) Vaibhav Gupta et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing

(2009) Ning Zhu et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS