A 320-fs RMS Jitter and – 75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC

Authors

Keywords

Journal

Volume 54, Issue 9, Pages 2501-2512

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Online

2019-06-18

DOI

10.1109/jssc.2019.2918940

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