Static and Quasi-Static Drain Current Modeling of Tri-Gate Junctionless Transistor With Substrate Bias-Induced Effects

Title
Static and Quasi-Static Drain Current Modeling of Tri-Gate Junctionless Transistor With Substrate Bias-Induced Effects
Authors
Keywords
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Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 66, Issue 7, Pages 2876-2883
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2019-05-30
DOI
10.1109/ted.2019.2915294

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