Energy-aware and fault-tolerant custom topology design method for network-on-chips

Published 2018 View Full Article

  1. Home
  2. Publications
  3. Publication Search
  4. Publication Details
Title
Energy-aware and fault-tolerant custom topology design method for network-on-chips
Authors
Keywords
Network-on-chip, Fault-tolerant topology, Genetic-algorithm
Journal
Nano Communication Networks
Volume 19, Issue -, Pages 54-66
Publisher
Elsevier BV
Online
2018-12-18
DOI
10.1016/j.nancom.2018.12.001

Ask authors/readers for more resources

Protocol

Community support

Reagent

Community support

Reprint

Contact the author

Find Funding. Review Successful Grants.

Explore over 25,000 new funding opportunities and over 6,000,000 successful grants.

Explore

Become a Peeref-certified reviewer

The Peeref Institute provides free reviewer training that teaches the core competencies of the academic peer review process.

Get Started
Webinars Posters Questions Hubs Funding Journals Articles Connect Collections Reviewers About Us FAQs Mobile App Privacy Policy Terms of Use
© Peeref 2019-2024. All rights reserved.