Novel high-speed reconfigurable FPGA architectures for EMD-based image steganography

Title
Novel high-speed reconfigurable FPGA architectures for EMD-based image steganography
Authors
Keywords
Algorithms, Image steganography, Exploiting modification direction (EMD), Reconfigurable architectures, Field programmable gate arrays (FPGA)
Journal
MULTIMEDIA TOOLS AND APPLICATIONS
Volume -, Issue -, Pages -
Publisher
Springer Nature
Online
2019-01-25
DOI
10.1007/s11042-019-7187-2

Ask authors/readers for more resources

Reprint

Contact the author

Discover Peeref hubs

Discuss science. Find collaborators. Network.

Join a conversation

Create your own webinar

Interested in hosting your own webinar? Check the schedule and propose your idea to the Peeref Content Team.

Create Now