4.7 Article

Minimal digital chaotic system

Journal

CHAOS SOLITONS & FRACTALS
Volume 120, Issue -, Pages 62-66

Publisher

PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.chaos.2019.01.019

Keywords

Chaos; Nonlinear dynamics; FPGA synthesis; Computer arithmetic; Digital system

Funding

  1. Brazilian Research Agency: CNPq/INERGE [465704/2014-0]
  2. Brazilian Research Agency: CNPq [425509/2018-4]
  3. Brazilian Research Agency: FAPEMIG [APQ-00870-17]
  4. Slovenian Research Agency [J1-7009, J4-9302, J1-9112, P1-0403]

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Over the past few decades, many works have been devoted to designing simple chaotic systems based on analog electronic circuits. However, the same attention is not observed in digital chaotic systems. This paper presents a design of a digital chaotic system using a digit complement. This special case of fixed-point number representation allows us to reduce the silicon area and the number of logic elements to perform the arithmetic operations. The design presents a configurable number of bits, and it is based on the logistic map. The proposed circuit has been implemented on a reconfigurable hardware, FPGA Cyclone V, showing that the number of logic elements has been significantly reduced compared to other works in the literature. (C) 2019 Elsevier Ltd. All rights reserved.

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