4.5 Article

On-chip real-time feature extraction using semantic annotations for object recognition

Journal

JOURNAL OF REAL-TIME IMAGE PROCESSING
Volume 15, Issue 2, Pages 249-264

Publisher

SPRINGER HEIDELBERG
DOI: 10.1007/s11554-014-0474-2

Keywords

Semantics-based vague image representation (SVIR); Bipolar image encoding; Vertical evolution; Lateral combination

Funding

  1. Ministry of Science and Technology - government of Taiwan [NSC 99-2221-E-027-057-MY3]
  2. Ministry of Education Taiwan

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Describing image features in a concise and perceivable manner is essential to focus on candidate solutions for classification purpose. In addition to image recognition with geometric modeling and frequency domain transformation, this paper presents a novel 2D on-chip feature extraction named semantics-based vague image representation (SVIR) to reduce the semantic gap of content-based image retrieval. The development of SVIR aims at successively deconstructing object silhouette into intelligible features by pixel scans and then evolves and combines piecewise features into another pattern in a linguistic form. In addition to semantic annotations, SVIR is free of complicated calculations so that on-chip designs of SVIR can attain real-time processing performance without making use of a high-speed clock. The effectiveness of SVIR algorithm was demonstrated with timing sequences and real-life operations based on a field-programmable-gate-array (FPGA) development platform. With low hardware resource consumption on a single FPGA chip, the design of SVIR can be used on portable machine vision for ambient intelligence in the future.

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