Journal
JOURNAL OF REAL-TIME IMAGE PROCESSING
Volume 11, Issue 2, Pages 349-374Publisher
SPRINGER HEIDELBERG
DOI: 10.1007/s11554-013-0353-2
Keywords
Real-time image processing; Methodology for hardware/software co-design in FPGA; High level synthesis; High level modeling; Multiple robot localization; Multithreaded programming; Hardware acceleration
Categories
Funding
- Czech project [7AMB12AR022]
- EU [ICT - 216240]
- Argentinian projects MINCyT [RC/11/20]
- UBACyT [200158]
- [PICT-2009-0041]
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Many image processing applications need real-time performance, while having restrictions of size, weight and power consumption. Common solutions, including hardware/software co-designs, are based on Field Programmable Gate Arrays (FPGAs). Their main drawback is long development time. In this work, a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is proposed. The goal of this methodology is to achieve real-time embedded solutions, using hardware acceleration, but achieving development time similar to that of software projects. Well established methodologies, techniques and languages from the software domain-such as Object-Oriented Paradigm design, Unified Modelling Language, and multithreading programming-are applied; and semiautomatic C-to-HDL translation tools and methods are used and compared. The methodology is applied to achieve an embedded implementation of a global vision algorithm for the localization of multiple robots in an e-learning robotic laboratory. The algorithm is specifically developed to work reliably 24/7 and to detect the robot's positions and headings even in the presence of partial occlusions and varying lighting conditions expectable in a normal classroom. The co-designed implementation of this algorithm processes 1,600 9 1,200 pixel images at a rate of 32 fps with an estimated energy consumption of 17 mJ per frame. It achieves a 169 acceleration and 92 % energy saving, which compares favorably with the most optimized embedded software solutions. This case study shows the usefulness of the proposed methodology for embedded real-time image processing applications.
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