Modeling effects of interface traps on the gate C–V characteristics of MOS devices on alternative high-mobility substrates

Published 2010 View Full Article

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Title
Modeling effects of interface traps on the gate C–V characteristics of MOS devices on alternative high-mobility substrates
Authors
Keywords
-
Journal
SOLID-STATE ELECTRONICS
Volume 54, Issue 6, Pages 621-627
Publisher
Elsevier BV
Online
2010-03-23
DOI
10.1016/j.sse.2010.02.004

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