Performance evaluation and design tradeoffs of on-chip interconnect architectures

Published 2010 View Full Article

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Title
Performance evaluation and design tradeoffs of on-chip interconnect architectures
Authors
Keywords
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Journal
SIMULATION MODELLING PRACTICE AND THEORY
Volume 19, Issue 6, Pages 1496-1505
Publisher
Elsevier BV
Online
2010-10-23
DOI
10.1016/j.simpat.2010.10.008

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