4.2 Article

AYUSH: A Technique for Extending Lifetime of SRAM-NVM Hybrid Caches

Journal

IEEE COMPUTER ARCHITECTURE LETTERS
Volume 14, Issue 2, Pages 115-118

Publisher

IEEE COMPUTER SOC
DOI: 10.1109/LCA.2014.2355193

Keywords

Non-volatile memory (NVM); hybrid cache; SRAM-NVM cache; device lifetime; write endurance

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Recently, researchers have explored way-based hybrid SRAM-NVM (non-volatile memory) last level caches (LLCs) to bring the best of SRAM and NVM together. However, the limited write endurance of NVMs restricts the lifetime of these hybrid caches. We present AYUSH, a technique to enhance the lifetime of hybrid caches, which works by using data-migration to preferentially use SRAM for storing frequently-reused data. Microarchitectural simulations confirm that AYUSH achieves larger improvement in lifetime than a previous technique and also maintains performance and energy efficiency. For single, dual and quad-core workloads, the average increase in cache lifetime with AYUSH is 6.90, 24.06 and 47.62x, respectively.

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