A load-balanced congestion-aware wireless network-on-chip design for multi-core platforms

Title
A load-balanced congestion-aware wireless network-on-chip design for multi-core platforms
Authors
Keywords
-
Journal
MICROPROCESSORS AND MICROSYSTEMS
Volume 36, Issue 7, Pages 555-570
Publisher
Elsevier BV
Online
2011-12-06
DOI
10.1016/j.micpro.2011.10.002

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