A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter

Published 2009 View Full Article

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Title
A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter
Authors
Keywords
-
Journal
MICROELECTRONICS JOURNAL
Volume 40, Issue 10, Pages 1441-1448
Publisher
Elsevier BV
Online
2009-08-13
DOI
10.1016/j.mejo.2009.06.005

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