Journal
MICRO & NANO LETTERS
Volume 3, Issue 3, Pages 101-105Publisher
INST ENGINEERING TECHNOLOGY-IET
DOI: 10.1049/mnl:20080029
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Funding
- FCRP IFC
- Air Force STTR
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A novel reconfigurable architecture, rFPGA, is developed by utilising high-density resistive memory (RRAM) circuits as FPGA components. Different from the existing CMOS-nano hybrid FPGAs that use crossbars, the rFPGA mainly consists of 1T1R RRAM structures (one CMOS transistor is integrated with a two-terminal resistive nanojunction) that can be fabricated using an efficient CMOS-compatible process. These 1T1R structures can significantly improve the FPGA memory and routing circuits, and enable the rFPGA to achieve at least a 2x density enhancement along with a 10% reduction of delay and power, compared with the corresponding CMOS FPGA.
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