Survey of Low-Energy Techniques for Instruction Memory Organisations in Embedded Systems

Instruction memory organisations have been pointed out as one of the major sources of energy consumption in embedded systems. As embedded systems are characterised by restrictive resources and a low-energy budget, any enhancement that is introduced into this component of the system will allow embedded designers not only to decrease the total energy consumption, but also to have a better distribution of the energy budget throughout the whole system. The work that is presented in this paper provides a synthesis on the low-energy techniques that are used in instruction memory organisations, outlining their comparative advantages, drawbacks, and trade-offs. Apart from giving the reader a first grasp on the fundamental characteristics and design constraints of various types of instruction memory organisations, the architectural classification that is presented in this paper has the advantage of clearly exhibiting lesser explored techniques, and hence providing hints for future research on instructions memory organisations that are used in embedded systems.