High-Throughput On-Chip Large Deformation of Silicon Nanoribbons and Nanowires

An on-chip internal stress-based testing device has been developed in order to deform silicon nanoribbons and nanowires up to large strains enabling high throughput of data. The fracture strain and survival probability distribution have been generated for 50-nm-thick and 50- or 500-nm-wide specimens with lengths varying between 2.5 and 10 mu m. Fracture strains reaching up to 5% are attained in the smallest specimens, whereas 90% of the specimens survive 2.5% deformation. This testing platform opens an avenue to investigate and use electromechanical couplings appearing under large mechanical stress or large deformation.