Fully parallel write/read in resistive synaptic array for accelerating on-chip learning

Published 2015 View Full Article

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Title
Fully parallel write/read in resistive synaptic array for accelerating on-chip learning
Authors
Keywords
-
Journal
NANOTECHNOLOGY
Volume 26, Issue 45, Pages 455204
Publisher
IOP Publishing
Online
2015-10-22
DOI
10.1088/0957-4484/26/45/455204

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